Linus Torvalds has come out strong against proposed support for RISC-V big endian capabilities within the Linux kernel.
In response to a mailing list comment whether RISC-V big endian “BE” patches being worked on would be able to make it for this current Linux kernel cycle. Linus Torvalds initially wrote:
"Oh Christ. Is somebody seriously working on BE support in 2025?
WHY?
Seriously, that sounds like just stupid. Is there some actual real reason for this, or is it more of the “RISC-V is used in academic design classes and so people just want to do endianness for academic reasons”?
Because I’d be more than happy to just draw a line in the sand and say “New endianness problems are somebody ELSES problem”, and tell people to stop being silly.
Let’s not complicate things for no good reason. And there is NO reason to add new endianness.
RISC-V is enough of a mess with the millions of silly configuration issues already. Don’t make it even worse.
Tell people to just talk to their therapists instead. That’s much more productive."
He’s right. I think it was really a mistake for RISC-V to support it at all, and any RISC-V CPU that implements it is badly designed.
This is the kind of silly stuff that just makes RISC-V look bad.
Couldn’t agree more. RISC-V even allows configurable endianness (bi-endian). You can have Machine mode little endian, supervisor mode big endian, and user mode little endian, and you can change that at any time. Software can flip its endianness on the fly. And don’t forget that instruction fetch ignores this and is always little endian.
Btw the ISA manual did originally have a justification for having big endian but it seem to have been removed:
We originally chose little-endian byte ordering for the RISC-V memory system because little-endian systems are currently dominant commercially (all x86 systems; iOS, Android, and Windows for ARM). A minor point is that we have also found little-endian memory systems to be more natural for hardware designers. However, certain application areas, such as IP networking, operate on big-endian data structures, and certain legacy code bases have been built assuming big-endian processors, so we have defined big-endian and bi-endian variants of RISC-V.
This is a really bad justification. The cost of defining an optional big/bi-endian mode is not zero, even if nobody ever implements it (as far as I know they haven’t). It’s extra work in the specification (how does this interact with big endian?) in verification (does your model support big endian?) etc.
Linux should absolutely not implement this.
I guess that could be useful if you’re designing a router OS? Is that even going to be a significant benefit there?
Unlikely, you’d do packet processing in hardware, either through some kind of peripheral or if you’re using RISC-V you could add custom instructions.
I agree with him tbh. There is no reason for endianness except we used to not agree on a single one. And as far as I’m aware, pretty much everything is LE at this point (when it comes to processor architecture)
As someone who only ever heard others argue about it, this sounds like something out of the 90s to me.
Weird stuff.
Mmmmm I don’t understand any of that lol
The mainline kernel is for mainline development. Not for random experiments that make the world a worse place.
And yes, we’re open source, and that very much means that anybody is more than welcome to try to prove me wrong.
If it turns out that BE RISC-V becomes a real thing that is relevant and actually finds a place in the RISC-V ecosystem, then of_course we should support it at that point in the mainline kernel.
But I really do think that it actually makes RISC-V only worse, and that we should not actively help the fragmentation."
I was worried this meant he was voicing disapproval for RISC-V in general, but he’s actually just taking about an implementation or maybe particular part instruction set or something?
I’d be curious how other RISC-V knowledgeable folks feel, whether they agree or disagree
Big endian is a byte order scheme. For registers and memory. If I’m not mistaken, pretty much all modern systems these days are little endian. The differences can largely be mitigated at the operating system level. But it definitely invites new chaos back into the equation. If programs don’t get their bytes in the right order, it will be garbage in garbage out everywhere. Try playing an old PCM wave file from a 68k based Macintosh or Amiga on a PC.
Interesting, thank you for explaining what it is!
The differences can largely be mitigated at the operating system level.
Exactly. And that also means that they have to be mitigated at the OS level and in this case, the kernel level.
It would usually be fine if the system had nothing other than RAM and fixed storage, but anything else (as simple as keyboard drivers and stuff) and you will need to make the program accordingly. Maybe even SATA would require handling endianness.Honestly, I thought that they already handled endianness, due to how many different things Linux works on.
But if it doesn’t then I don’t see there being much of a requirement.For networking devices and such, I’d rather favour more customised solutions either way.
Some big-endian architectures are supported, but not RISC-V:
A related problem is big-endian support, which is also 32-bit only, and also obsolete. Its removal is blocked because IBM is still supporting big-endian mainframe and PowerPC systems; as long as that support continues, big-endian support will stay in the kernel.
There aren’t currently any RISC-V hardware implementations that support big endian (although I guess someone must have tried it on a simulator), so supporting it in the Linux kernel is about as useful as supporting any other hypothetical CPU that only exists on paper. The mainline kernel is meant for computers that exist in the real world, so supporting BE RISC-V should only happen after such CPUs have actually been made. As things stand, there’s nothing to suggest that anyone will bother making them, so the Linux maintainers shouldn’t bother supporting them.
I really appreciate the accessible explanation, thank you!
At least his own therapist has helped him express himself only a little unprofessionally.
